Oki's MCUs - ML671000

Oki's MCUs - ML671000
Oki's CMOS 32-Bit Single-Chip Microcontroller with Built-in USB Device Controller

Documents

» PDF of this Data Sheet (262 KB) is available.

ML671000.pdf

»	CMOS 32-Bit Single-Chip Microcontroller. ML671000 User's Manual

»	User's Guide. ML671000 CPU Board User's Guide

Description

This high-performance CMOS 32-bit micro-controller combines the 32-bit ARM7TDMI™ core, a RISC CPU developed by Advanced RISC Machines Limited (ARM), with a DMA controller, serial ports, PWM generator, analog-to-digital converter, 16-bit timers, and other peripheral functions on a single LSI. In addition to 32-bit data processing, this LSI includes internal RAM and onboard peripherals that make it ideal for such embedded control applications as PC peripherals and communication terminals. Finally, there is a built-in external memory controller for directly connecting ROM, SRAM, SDRAM, other memory types, and peripheral devices.

Features

CPU

»	RISC 32-bit CPU (ARM7TDMI)
»	Executable 32-bit instructions and 16-bit instructions
»	General registers: 32-bit x 31 registers
»	Built-in multiplier
»	Little-endian format

Memory Spaces

»	Internal RAM: 4K bytes
»	External ROM, RAM, I/O: 26 M bytes
»	External DRAM: 32 M bytes

I/O Ports

»	I/O pins: 64 pins (I/O directions are specified at the bit level)

Timers

»	16-bit flexible timer x 2ch (auto-reload, compare-output, PWM, capture modes) 16-bit auto-reload timer x 2ch 12-bit watchdog timer

Serial Ports

»	UART (16550A equivalent) x 1ch, UART/synchronous serial x 1ch

USB Device Controller

»	USB1.1 compliant, support full-speed (12 Mbps)
»	Transmission type: control, bulk, isochronous, interrupt
»	Remote wakeup function
»	Adaptable to USB bus powered devices
»	Four endpoint addresses
»	Endpoint FIFO size
»	EP0 64 bytes x 2 (transmit/receive) EP1 64 bytes x 1 (transmit-receive) EP2 64 bytes x 2 (transmit-receive, 2 levels) EP3 256 bytes x 2 (transmit-receive, 2 levels)

DMA Controller

»	x 2ch
»	Single and Dual addressing modes
»	Cycle steal and Burst transfers
»	8- or 16-bit data transfers
»	Maximum transferring: 65536 times
»	Addressing area: 64 M bytes

Interrupt Controller

»	Interrupt sources: 22 (13 internal , 9 external )
»	Interrupt priority: 8 levels

Memory Controller

»	Direct connection to ROM, SRAM, DRAM and peripheral 4-bank memory control ROM, RAM, I/O x 2 banks; DRAM x 2 banks User-configurable bus width and wait control each Arbitration of external bus request.

Other

»	Arbitration of external bus request Power saving functions Standby modes: HALT and STOP modes Clock gears: Selection of 1/2 OSC, 1/1 Onboard debugging is possible with JTAG interface. Built-in PLL: x4

Power Supply Voltage

»	3.0 to 3.6 V

Operating Frequency

»	CPU: 6, 12, 24 MHz; USB: 48 MHz @12 MHz (Operating USBC)(Operating CPU: 1 to 24 MHz (Non-Operating USBC)

Operating Temperature Range

»	-10°C to 70°C

Package

»	128-pin plastic QFP (QFP128-P-1420-0.50-K)

Applications

»	Digital still camera, Printer, Terminal Adapter for ISDN,
»	PC peripheral and Communication terminal, etc.