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Design Services

Oki/ChipX offers specialized design services to take your designs from RTL code to complete fabrication.  Oki/ChipX' system-level design services supports ASIC and SOC designs using deep submicron technologies and also using industry-leading IPs and cores. Turnkey FPGA to ASIC conversion services are also available.

With Oki/ChipX' design services, your ASIC designs will get completed quickly to help your product get to the market fast and give your company the market advantage.


Oki/ChipX Technology
Oki/ChipX offers process support for 0.5µm (3.3V and true 5V applications), 0.35µm, 0.22µm, 0.15µm and 0.13µm with a broad range of packages and production that meets world class standards of reliability.

Why Oki/ChipX?

  • 100% first time silicon success rate
  • More than 20 years of semiconductor company experience
  • Innovation and success in end-to-end ASICs since 1983
  • Unchallenged level of experience and capabilities
  • 70% repeat ASIC business and that's the best proof for customer satisfaction with both Oki/ChipX' products and services
  • Oki/ChipX' design centers, fabs and assembly mean flawless transition from design to successful production
  • Oki/ChipX equals fast time to market for your products


Design Support
Oki/ChipX' experienced internal design team is one reason for our 100% first time silicon success rate. Oki/ChipX also offers customized design project management that is tailored to the customer's needs and their level of ASIC design expertise.


  • Technology and process evaluation, custom IP and package selection
  • IP cores such as ARM7TDMI, ARM946E, ARM920T, USB, Ethernet MAC and high speed I/Os
  • ASIC design engagement at the RTL or Gate Netlist level interface
  • RTL Design Handoff and support for Formal Verifications
  • Design Testability (DFT, Scan and JTAG insertion, Memory MBIST and power optimization)
  • Support for test-benches for the custom IP
  • Floor planning using Oki/ChipX' tools
  • Signal Integrity supports
  • Timing Driven Design Methodology for Timing Closure
  • Final Placement and Route using SE-PKS tools
  • Static Timing as a Sign-off
  • For End Of Life (EOL) designs that require a true 5V support, Oki/ChipX has introduced their 3rd. generation MG38R 0.50µm process
  • Low-cost FPGA to ASIC conversion
  • Fast turn-around-time — less than two weeks for STA based sign-off for 1 million gates

 

Contact Oki/ChipX Today
Oki/ChipX offers superior support and service for your ASIC designs. Get your design services with Oki/ChipX started today.

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