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ASIC Request for Quote

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Design Interface
(Check one)
Netlist RTL
FPGA Conversion Other
Application:
Process Feature Size (check one):
0.13µm 0.15µm
0.22µm 0.35µm
0.50µm other
Maximum Operating Frequency (MHz):
Random Logic Gate Count:
I/O Count:
Memory Functions (check all):
SRAMs Embedded RAM
ROMs Other
IP Cores:
EDA Tools:
Package Type (pin count):
QFP TQFP/LQFP
BGA Other
Projected design start date:
Projected prototype ship date:
Projected production start date:
Annual projected production volume (K units):
Target NRE charges ($K):
Target unit price ($):
Vendor selection criteria:
Other vendors invited to bid:
Comments: