MSM13Q/14Q Documents
Description The MSM13Q/14Q Series contains 6 arrays each, offering over 1 million raw
gates and 352 I/O pads. Up to 66% and 90% of the raw gates can be used for the
3-layer and 4-layer arrays, respectively. Oki's 0.35µm family is optimized for
3.3-V core operation with optimized 3.3-V I/O buffers and 5-V tolerant 3.3-V
buffers. These SOG products are designed to fit the most popular plastic quad
flat packs (QFPs), thin QFPs (TQFPs), and plastic ball grid array (PBGA)
packages.
The MSM13Q/14Q Series uses the popular CBA architecture from Silicon
Architects of Synopsys which mixes two types of cells (8-transistor compute
cells and 4-transistor drive cells) on the same die to deliver high gate density
and high drives. The CBA is supported by a rich macro library, optimized for
synthesis. Memory blocks are efficiently created by Oki's memory compilers to
generate single- and dual-port RAM's in high-density and low-power
configurations with synchronous RAM options.
As such, the MSM13Q/14Q series is well suited to memory-intensive designs
with high production volumes approaching the real estate and cost savings of
standard cells. At the same time, its SOG structure allows rapid prototyping
turnaround times. Thus, Oki's MSM13Q/14Q family offers the best of two worlds:
quick prototyping of a gate array and low production cost of a standard cell.
Oki's 0.35µm ASIC products are supported by leading-edge CAD tools including
a synthesis-linked floorplanner, motive static timing analyzer, and H-clock tree
methodology. They are further supported by specialized macrocells including
phase-locked loop (PLL), pseudo-emitter coupled logic (PECL), peripheral
component interconnect (PCI), universal synchronous receiver/transmitter (UART)
cells, and ARM7TDMI RISC cores. |
