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ML675001/Q5002/Q5003
- User's Manual
 32-Bit General Purpose
ARM-Based Microcontroller
Documents
| » PDF of ML675001/Q5002/Q5003 Series DMA
Functional Restrictions (102 KB) is available. |
ML67Q5K_DMA_v1.pdf
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ML675001/ML67Q5002/ML67Q5003 32-Bit ARM® -Based General
Purpose Microcontrollers. ML675K
Series |
Features
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This high-performance CMOS 32-bit micro-controller combines
the 32-bit ARM7TDMI TM core, a RISC CPU developed by Advanced RISC Machines
Limited (ARM), with a DMA controller, serial ports, PWM generator,
analog-to-digital converter, 16-bit timers, and other peripheral functions on a
single LSI. In addition to 32-bit data processing, this LSI includes internal
RAM and onboard peripherals that make it ideal for such embedded control
applications as PC peripherals and communication terminals. Finally, there is a
built-in external memory controller for directly connecting ROM, SRAM, SDRAM,
other memory types, and peripheral devices. The following is a list of features.
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CPU
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32-bit RISC CPU (ARM7TDMI) |
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Built-in 8KB unified cache (ML675001 series only) |
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Little endian byte order |
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Operating frequency:
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ML674001 series :1 MHz to 33 MHz ML675001 series :1 MHz to 60
MHz | |
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Instruction set: Free switching between a highly dense 32-bit
instruction set and a 16-bit subset offering higher object code efficiency
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General-purpose registers: 32-bit x 31 |
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Barrel shifter: Simultaneous ALU and barrel shift operations
in the same instruction |
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Multiplier (32-bit x 8-bit) |
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JTAG interface for debugging
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Built-in Memory
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SRAM 32Kbytes (8K x 32bits), 1 cycle access |
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Boot ROM 4Kbytes (1K x 32bits) |
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FLASH memory
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ML674001: ROM-less version |
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ML67Q4002: 256Kbytes (128K x 16bits) |
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ML67Q4003: 512Kbytes (256K x 16bits) |
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ML675001: ROM-less version |
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ML67Q5002: 256Kbytes (128K x 16bits) |
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ML67Q5003: 512Kbytes (256K x 16bits)
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