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Implementation of a Multi-Slave SPI Bus Using the SSIO Port of Oki Advantage Microcontrollers
App Note
 

Documents

»  PDF of this Application Note (492 KB) is available. SSIO-AppNote.pdf
»  ML675001/ML67Q5002/ML67Q5003 32-Bit ARM® -Based General Purpose Microcontrollers. ML675K Series
»  Download the SSIO App Note Sample Source Code

Description

Serial Peripheral Interface(SPI) is a popular and flexible method of serial communication that is frequently used in embedded systems. SPI requires few I/O lines and it is fast and efficient. The Oki ML674001/2/3 and ML675001 series of ARM®-based MCUs are equipped with a Synchronous Serial I/O (SSIO) controller that provides efficient communications with SPI compatible devices.

This Application Note describes how to use the ML674001/2/3 and ML675001 MCU's SSIO port to interface with two or more SPI-enabled peripherals. The peripherals used for this example are SPI-EEPROMs. This Application Note defines the hardware and software implementation for this system. Software samples written in C are available as examples and building blocks for user applications.

Overview of Oki Advantage Microcontrollers

Oki Advantage Microcontrollers are a powerful and growing family of ARM-based MCUs that deliver the flexibility and advanced features of 32-bit MCUs at 16-bit MCU prices. Advantage Microcontrollers offer numerous embedded peripheral controllers combined with on-chip SRAM and various densities of on-chip flash.

By offering a de-facto standard 32-bit processor core architecture, advantage ARM based microcontrollers help to ease product development by having a variety of high-quality development tools, an excellent on-chip debug architecture (embeddedICE), and great support infrastructure that provide RTOS' and application software. This support infrastructure shortens time to market and improves productivity.

Advantage Microcontrollers offer a range of products with a selection of flash densities, a choice of operating frequencies, and a choice of internal cache. The pin compatibility feature of these MCUs gives designers flexibility in their designs by allowing them to use MCUs with various performance capability and memory densities on the same design.

   

Features

»  ARM7TDMI core offering a de-facto standard 32-bit architecture
»  Thumb instruction set to deliver 16-bit code density and power efficiency
»  32-bit and 16-bit instruction set
»  Built-in Flash ROM
»  256 KB (ML67Q4002 and ML67Q5002)
»  512 KB (ML67Q4003 and ML67Q5003)
»  32 KB of built-in fast SRAM
»  Two external DMA channels
»  Seven 16-bit timers
»  16-bit Watch Dog timer
»  Two 16-bit PWMs
»  UART, SSIO, SIO and I2C serial interfaces
»  42 GPIOs
»  Four 10-bit A/D converters
»  EmbeddedICE on-chip hardware debug architecture
»  Built in Boot ROM for program download and execution
»  4-way set associative Cache (ML675001/2/3 only)
»  Operating frequency:
»  60 MHz for ML675001/2/3
»  33 MHz for ML674001/2/3