MSM54V25632A

MSM54V25632A
256K x 32 SGRAM

Documents

» PDF of this Data Sheet (865 KB) is available.

MSM54V25632A.pdf

Description

The MSM54V25632A is a synchronous graphics random access memory organized as 128 K words x 32 bits x 2 banks. This device can operate up to 100 MHz by using synchronous interface. In addition, it has 8-column Block Write function and Write per bit function which improves performance in graphics systems.

Features

131,072 words x 32 bits x 2 banks memory

Single 3.3 V ±0.3 V power supply

LVTTL compatible inputs and outputs

All input signals are latched at rising edge of system clock

Auto precharge and controlled precharge

Internal pipelined operation: column address can be changed every clock cycle

Dual internal banks controlled by A9 (Bank Address: BA)

Independent byte operation via DQM0 to DQM3

8-column Block Write function

Persistent write per bit function

Programmable burst sequence (Sequential / Interleave)

Programmable burst length (1, 2, 4, 8 and full page)

Programmable *CAS latency (1, 2 and 3)

Burst stop function (full-page burst)

Power Down operation and Clock Suspend operation

Auto refresh and self refresh capability

1,024 refresh cycles/16 ms

Package:

»	100-pin plastic QFP (QFP100-P-1420-0.65-BK4) (Product : MSM54V25632A-xxAGBK4)
»	xx indicates speed rank.