ML674000, ML674001/2/3, and ML675001/2/3 MCUs, have multiple GPIO pins that sometimes are multiplexed with other functional blocks of the MCU. Thus, during initialization, these pins have to be configured for their primary or secondary functions according to application requirements.

The primary and secondary function of the GPIO pins are configured through the Port Function Select Register (GPCTL). The primary/secondary function for groups of GPIOs is set or reset at one time. Thus, it is not always possible to set the primary/secondary function for individual bits of PIOs.

For example, in ML674000, PIOA[8] and PIOA[9] pins have the secondary function of STXD and SRXD respectively. The primary or secondary role for these two PIO pins is jointly set. It is not possible to have PIOA[8] primary/secondary role set independently of PIOA[9]. The primary/secondary role settings for other PIO pins are similar. Thus, although the GPIO pins are not configurable at the bit level independently, they can be configured independently in small groups.

ML671000 GPIOs are configured differently to where the primary/secondary function of each GPIO pin can be set independently at the bit level.