Why does the ML67Q4003/ML67Q5003 CPU board serial Flash write utility start programming the internal Flash at address 0xcc00.0000 and not 0xc800.0000?
Descriptive Answer:
The memory map for the ML67Q5003/ML67Q4003 CPU board will vary depending one the BSEL0/1 settings. The CPU users manual shows internal flash starting at address 0xc800.0000. However, this is only true when BSEL0/1 are both tied low. To program the internal Flash we must boot the ML67Q5003/ML67Q4003 CPU board in Boot ROM mode (BSEL1=1 and BSEL0=1), then internal Flash starts at 0xcc00.0000 and SRAM appears at 0xc800.0000. The table below shows how the memory map changes depending on the BSEL1/0 setting:
On the ML67Q4003 CPU Board, SRAM(TC55V16256) occupies part of Bank25 while internal Flash occupies the other.
| Boot Type | BSEL 0 | BSEL 1 | ROMSEL | MEMDIS | 0x0 | 0xc800.0000 | 0xcc00.0000 |
|---|---|---|---|---|---|---|---|
| Int Flash | 0 | 0 | 1 | 0 | Int Flash | Int Flash | Ext SRAM |
| Ext Rom | 1 | 0 | 1 | 0 | Ext SRAM | Ext SRAM | Int Flash |
| Boot Rom | 0 | 1 | 1 | 0 | Boot Rom | Int Flash | Ext SRAM |
| Boot Rom | 1 | 1 | 1 | 0 | Boot Rom | Ext SRAM | Int Flash |
On the ML67Q4003 CPU Board, SRAM(TC55V16256) occupies part of Bank25 while internal Flash occupies the other.
