The GPIO pins of ML674000 are multiplexed with secondary functionalities. Thus, they can be configured and used either in their primary function as GPIOs or as their secondary functions. These settings are generally made in the Port Function Select Register (GPCTL). The Port B GPIOs PIOB[15:9] are an exception. These pins have a secondary function as SDRAM control pins.

To configure PIOB[15:9] for their primary function as GPIOs, the Mode[2:0] external pins of the MCU must be configured in hardware as noted in Chapter 4 "Chip Configuration" of ML674000 User's Manual. Based on the Mode[2:0] pin levels, the PIOB[15:9] pins will function in either their primary function as GPIO pins or their secondary function as SDRAM control pins.